1、题目Given the following state machine with 3 inputs, 3 outputs, and 10 states:Derive next-state logic equations and output logic equationsby inspectionassuming the following one-hot encoding is used: (S, S1, S11, S110, B0, B1, B2, B3, Count, Wait) (10b0000000001, 10b0000000010, 10b0000000100, ... , 10b1000000000)Derive state transition and output logic equations by inspectionassuming a one-hot encoding. Implement only the state transition logic and output logic (the combinational logic portion) for this state machine. (The testbench will test with non-one hot inputs to make sure youre not trying to do something more complicated. See fsm3onehot for a description of what is meant by deriving logic equations by inspection for one-hot state machines.)Write code that generates the following equations:B3_next -- next-state logic for state B3S_nextS1_nextCount_nextWait_nextdone -- output logiccountingshift_ena2、分析相对简单看图说话比如B3_next要求表示B3_next意思是什么状态的下一个状态是B3状态3、代码module top_module( input d, input done_counting, input ack, input [9:0] state, // 10-bit one-hot current state output B3_next, output S_next, output S1_next, output Count_next, output Wait_next, output done, output counting, output shift_ena ); // // You may use these parameters to access state bits using e.g., state[B2] instead of state[6]. parameter S0, S11, S112, S1103, B04, B15, B26, B37, Count8, Wait9; assign B3_next state[B2]; assign S_next (state[S](d1b0)) | (state[S1](d1b0)) | (state[S110](d1b0)) | (state[Wait](ack1b1)); assign S1_next (state[S](d1b1)); assign Count_next state[B3] | (state[Count](!done_counting)); assign Wait_next (state[Count](done_counting)) | (state[Wait](ack1b0)); assign done state[Wait]; assign counting state[Count]; assign shift_ena state[B0] | state[B1] | state[B2] | state[B3]; endmodule